
PIC16(L)F1526/27
DS41458A-page 36
Preliminary
2011 Microchip Technology Inc.
Bank 31
F8Ch
—
FE3h
—
Unimplemented
—
FE4h STATUS_SHAD
—
Z_SHAD
DC_SHAD C_SHAD ---- -xxx ---- -uuu
FE5h WREG_SHAD
Working Register Normal (Non-ICD) Shadow
xxxx xxxx uuuu uuuu
FE6h BSR_SHAD
—
Bank Select Register Normal (Non-ICD) Shadow
---x xxxx ---u uuuu
FE7h PCLATH_SHAD
—
Program Counter Latch High Register Normal (Non-ICD) Shadow
-xxx xxxx uuuu uuuu
FE8h FSR0L_SHAD
Indirect Data Memory Address 0 Low Pointer Normal (Non-ICD) Shadow
xxxx xxxx uuuu uuuu
FE9h FSR0H_SHAD
Indirect Data Memory Address 0 High Pointer Normal (Non-ICD) Shadow
xxxx xxxx uuuu uuuu
FEAh FSR1L_SHAD
Indirect Data Memory Address 1 Low Pointer Normal (Non-ICD) Shadow
xxxx xxxx uuuu uuuu
FEBh FSR1H_SHAD
Indirect Data Memory Address 1 High Pointer Normal (Non-ICD) Shadow
xxxx xxxx uuuu uuuu
FECh —
Unimplemented
—
FEDh STKPTR
—
Current Stack Pointer
---1 1111 ---1 1111
FEEh TOSL
Top of Stack Low byte
xxxx xxxx uuuu uuuu
FEFh TOSH
—
Top of Stack High byte
-xxx xxxx -uuu uuuu
TABLE 3-2:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend:
x
= unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note
1:
PIC16F1526/7 only.
2:
Unimplemented, read as ‘1’.